216th ECS Meeting - Vienna, Austria

October 4 - October 9, 2009

PROGRAM INFORMATION
 

E5 - Processing, Materials and Integration of Damascene and 3D Interconnects

Dielectric Science and Technology
 

Monday, October 5, 2009

Room U550, Level OE - Yellow

Damascene Copper Interconnects

Co-Chairs: G. Mathad, J. Flake, H. Rathore, and O. Leonte
TimeAbs#Title and Authors
09:30   2157   Integration Challenges for Copper Damascene Electroplating: An Invited Talk U. G. Stöckgen (GLOBALFOUNDRIES Dresden Module One Limited Liability Company & Co. KG), S. Wehner, J. Heinrich, and A. Kiesel (AMD Fab 36 Limited Liability Company & Co. KG, a Company of GlobalFoundries.)
10:00   2158   Process Compatibility of New Advanced Low-k Dielectric A. Ferchichi, K. Vanstreels, N. Heylen, G. Beyer, M. Baklanov (IMEC), S. Asakuma, and M. Nakajima (SUMITOMO BAKELITE)
10:20   2159   Plasma Deposition and Development of Ultralow-k Bilayer SiCNx/SiCNy Dielectric Cu Cap for 32 nm CMOS Devices S. V. Nguyen (IBM at Albany Nanotech), A. Grill, S. Cohen (IBM Research), H. Shobha (IBM Albany, STG), N. Klymko (IBM STG), E. Simonyi (IBM Research), T. Haigh Jr (IBM STG), C. Hu (IBM Research), E. Adams (IBM STG), E. Liniger (IBM Research), A. Madan (IBM STG), T. Shaw (IBM Research), E. Ryan (GlobalFounderies Inc.), T. Cheng, J. Herman, and R. Young (IBM STG)
10:40 Intermission (20 Minutes)
11:00   2160   Mechanical Reinforcement of Porous-Silica Low-k Film by Pore Surface Silylation Y. Kayaba (Hiroshima university), K. Kohmura, H. Tanaka (Mitsui Chemicals), Y. Seino (AIST), S. Chikaki (SELETE), and T. Kikkawa (Hiroshima university)
11:20   2161   Chemical Repair of Plasma Damaged Porous Ultra Low-k SiOCH Film using a Vapor Phase Process T. Oszinda (Fraunhofer CNT), M. Schaller, D. Fischer, S. Leppack (GlobalFoundries), and S. E. Schulz (Fraunhofer ENAS)
11:40 Intermission (120 Minutes)
13:40   2162   Acceleration of Copper Electroless Plating with Addition of PEG-Thiols F. Inoue, T. Yokoyama (Kansai University), S. Tanaka, K. Yamamoto (National Institute of Communication Technology), and S. Shingubara (Kansai University)
14:00   2163   Mechanistic Aspects of SPS Decomposition in Iron Mediated Copper Plating Solution J. D. Adolf (Case Western Reserve University), R. Preisser (Atotech USA), and U. Landau (Case Western Reserve University)
14:20   2164   Influence of Carbon Nanotubes on the Electrodeposition of Copper Interconnects T. Chowdhury (Tyndall National Institute) and J. F. Rohan (Tyndall National Institute, University College Cork)
14:40   2165   Molecular Simulation and Modeling of Nanoscale Vertical Interconnects Y. Kaneko (Kyoto University), K. Ohara, and F. Asa (C. Uyemura & Co., Ltd.)
15:00 Intermission (20 Minutes)
15:20   2166   Effects of Slurry Distribution using Diaphram and Centrifugal Pumps on the Defectivity in a Cu CMP Process R. Donis, M. Fisher (Air Liquide), and L. Bauck (Levitronix LLC)
15:40   2167   Effect of Functional Groups of Complexing Agents on the Performance of Cu CMP Slurry Y. Kim, J. Bae, and J. Kim (Seoul National University)
16:00   2168   Effect of 5-Phenyl-1H-tetrazole on Copper Dissolution for e-CMP P. Cojocaru, L. Magagnin, and P. L. Cavallotti (Politecnico di Milano)
16:20   2169   Pad Conditioning for Scratch-Free, Cu Chemical Mechanical Polishing T. Eusner, N. Saka, and J. Chun (Massachusetts Institute of Technology)
16:40   2170   Electromigration Induced Metal Voiding Mechanism on Electron Directions and Via Numbers Effect for Copper Dual Damascene Interconnection B. Wei (National Chiao-Tung University), Y. L. Cheng, and Y. Wang (National Chi-Nan University)
 

Tuesday, October 6, 2009

Room U550, Level OE - Yellow

3D Interconnects

Co-Chairs: P. Ramm and F. Roozeboom
TimeAbs#Title and Authors
08:30   2171   Self-Assembled 3D Chip Stacking Technology - an Invited Talk K. Lee, T. Fukushima, T. Tanaka, and M. Koyanagi (Tohoku University)
09:00   2172   Miniaturization of a Wireless Senor Node by Means of 3D Interconnects: An Invited Talk J. Prainsack, M. Dielacher, M. Flatscher, T. Herndl, R. Matischek (Infineon Technologies Austria), P. Ramm (Fraunhofer IZM), J. Stolle (Fraunhofer IIS EAS Dresden), J. Weber (Fraunhofer IZM Munich), and W. Weber (Infineon Technologies)
09:30   2173   3D Integration Technology Activities at CEA-LETI Minatec M. Scannell (CEA-Leti), G. Poupon, L. Di Cioccio, D. Henry, J. Souriau, F. Grossi, P. Leduc, P. Battude, M. Vinnet, P. Guegen, L. Clavalier, and N. Sillon (CEA)
10:00   2174   3D Interconnect Technologies for Advanced MEMS/NEMS Applications - an Invited Talk N. Lietaer, M. Taklo, K. Schjølberg-Henriksen (SINTEF), and P. Ramm (Fraunhofer IZM)
10:30 Intermission (10 Minutes)
10:40   2175   Through-Silicon Via Technology for 3D Applications - an Invited Talk H. G. Philipsen (IMEC), O. Lühn (IMEC and Katholieke Universiteit Leuven), Y. Civale, D. Sabuncuoglu Tezcan (IMEC), and W. Ruythooren (IMEC vzw)
11:10   2176   Advances in Copper Fill for 3D Interconnect Applications - an Invited Talk T. Ritzdorf and D. Erickson (Semitool)
11:40   2177   Copper Electrodeposition Parameters Optimization for Through-Silicon Vias Filling E. Delbos, L. Omnès (OMGroup Ultra Pure Chemicals), and A. Etcheberry (Institut Lavoisier de Versailles UMR CNRS 8180)
12:10 Intermission (120 Minutes)
14:10   2178   Copper Plating for 3D Interconnects A. Radisic (IMEC vzw), O. Lühn (IMEC and Katholieke Universiteit Leuven), J. Vaes, S. Armini, Z. El-Mekki, D. Radisic, W. Ruythooren, and P. M. Vereecken (IMEC vzw)
14:40   2179   The Role of Additives and Deposition Parameters in Cu Plating of High Aspect Ratio Vias T. Ko (TSMC, IMEC), A. Radisic, S. Armini, P. M. Vereecken (IMEC vzw), C. Drijbooms, H. Bender (IMEC), S. Sun, C. Wann, C. Yu (TSMC), P. Leunissen (IMEC), W. Ruythooren (IMEC vzw), and S. Vanhaelemeersch (IMEC)
15:10   2180   High Speed Copper Electrodeposition for Through Silicon Via K. Kondo, Y. Suzuki, T. Saito, and N. Okamoto (Osaka Prefecture University)
15:40   2181   Scaling Analysis of Bottom-Up Fill with Application to Through Silicon Vias J. D. Adolf and U. Landau (Case Western Reserve University)
16:10 Intermission (10 min) (10 Minutes)
16:20   2182   Reliability of Through Silicon Via Technologies - an Invited Talk A. Klumpp and P. Ramm (Fraunhofer IZM)
16:50   2183   Wafer-Level Copper Bonding Technology in 3D ICs - An Invited Talk K. Chen (National Chiao Tung University)
 

Gallery, Level 01 - Green

Poster Session - Processing, Materials, and Integration of Damascene and 3D Interconnects

Co-Chairs:
TimeAbs#Title and Authors
o   2184   Study the Correlation between Emission Spectroscopy and Diamond-Like Films Deposition from Various CO-CO2-H2 gas Mixtures Plasma P. Chen (I-Shou University)
o   2185   Moisture Effect on Electromigration Characteristics for Copper Dual Damascene Interconnection Y. L. Cheng (National Chi-Nan University) and B. Wei (Department of Materials Science and Engineering, National Chung-Hsing University, Hsinchu)
o   2186   Evaluation of Stability and Reactivity of Solutions by In Situ Transmittance in Electroless Deposition K. Park, H. Koo, T. Lim, and J. Kim (Seoul National University)
o   2187   The Functional Group Effect of Complexing Agent on Cu CMP in the Neutral Environment J. Bae, Y. Kim, and J. Kim (Seoul National University)
o   2188   Effects of High-Temperature Porogens on the Moisture Uptake and Diffusion Behavior of Novel MSQ/Porogen Hybrid Low-k Dielectrics M. Che (National Chiao-Tung University), J. Teng, P. Lai, and J. Leu (National Chiao Tung University)